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  october 2009 ? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 FSQ500N ? green mode fairchild power switch (fps?) FSQ500N green mode fairchild power switch (fps?) features ? single-chip 700v sensefet power switch ? precision fixed operating frequency: 130khz ? no-load consumption 250mw at 265v ac with burst mode ? internal startup switch ? soft-start time tuned by external capacitor ? under-voltage lockout (uvlo) with hysteresis ? pulse-by-pulse current limit ? overload protection (olp) and internal thermal shutdown function (tsd) with hysteresis ? auto-restart mode ? no need for auxiliary bias winding applications ? stb and dsl power supply ? home appliance, ih cooker, auxiliary power supply related resources ? an-4137-design guidelines for off-line flyback converters using fps ? an-4141-troubleshooting and design tips for fairchild power switch (fpstm) flyback applications ? an-4147-design guidelines for rcd snubber of flyback ? an6075- (flyback) -an-6075-compact green- mode adapter using fsq500l for low cost description the FSQ500N is specially designed for low cost, small set-top box, dsl, home appliance auxiliary power supplies. this device combines a current-mode pulse width modulator (pwm) with a sensefet. the integrated pwm controller features include: a fixed oscillator, under-voltage lockout (uvlo) protection, overload protection (olp), leading-edge blanking (leb), an optimized gate turn-on/turn-off driver, thermal shutdown (tsd) protection with hysteresis, and temperature-compensat ed precision-current sources for loop compensation. when compared to a linear power supply, the FSQ500N reduces total size and weight, while increasing efficiency, productivity, and system reliability. this device provides a basic platform for cost-effective flyback converters. maximum output power (1) 230v ac 15% (2) 85-265v ac adapter (3) open frame (4) adapter (3) open frame (4) 4.0w 6.5w 3.5w 5.5w notes: 1. the junction temperature can limit the maximum output power. 2. 230v ac or 100/115v ac with doubler. 3. typical continuous power in a non-ventilated enclosed adapter measured at 50 c ambient. 4. maximum practical continuous power in an open frame design at 50 c ambient. ordering information part number operating temperature range eco status package packing method FSQ500N -40c to +85c rohs 8-lead, molded dual inline package (mdip), jedec ms-001, .300 inch wide rail for fairchild?s definition of eco status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html .
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 2 FSQ500N ? green mode fairchild power switch (fps?) application circuit diagram drain gnd v fb v cc ac in dc out pwm figure 1. typical application circuit internal block diagram figure 2. internal block diagram
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 3 FSQ500N ? green mode fairchild power switch (fps?) pin configuration figure 3. package / pin diagram pin definitions pin # name description 1 nc no connection 2 v cc this pin is connected to a storage capacitor. a high-voltage regulator connected between pin 8 (v str ) and this pin provides the supply voltage to the FSQ500N at startup and when switching during normal operation. the FSQ500N eliminates the need for auxiliary bias winding and associated external components. 3 v fb this pin is internally connected to the non-inverti ng input of the pwm comparator. the collector of an opto-coupler is typically tied to this pin. for stable operation, a capacitor should be placed between this pin and gnd. if the voltage of this pi n reaches 4.5v, the over load protection triggers, which shuts down the fps. 4, 5, 6 gnd this pin is the control ground and the sensefet source. 7 nc no connection 8 drain high-voltage power sensefet drain connection v cc 8-dip v fb nc drain gnd gnd gnd nc
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 4 FSQ500N ? green mode fairchild power switch (fps?) absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v ds drain pin voltage (5) 700 v v cc supply voltage 10 v v fb feedback voltage range -0.3 v cc v p d total power dissipation 1.42 w i dm drain current pulsed (6) 0.41 a t j operating junction temperature -40 +150 c t stg storage temperature -55 +150 c esd (7) human body model, jesd22-a114 2.5 kv charged device model, jesd22-c101 2 notes: 5. ldmos available drain voltage is -0.3v ~ 700v. 6. repetitive rating: pulse width is limited by maximum junction temperature. 7. meet jedec standards jesd 22-a114 and jesd 22-c101 thermal impedance symbol parameter value unit ja (8)(9) junction-to-ambient thermal resistance 88 c/w jc (8)(10) junction-to-case thermal resistance 19 c/w note: 8. all items are tested with the standards jesd 51-2 and jesd 51-10 (dip package). 9. ja free-standing, with no heat-sink, under natural convection. 10. jc , junction to lead thermal characteristics under ja test condition. t c is measured on the source #7 pin closed to plastic interface for ja thermo couple is mounted on soldering.
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 5 FSQ500N ? green mode fairchild power switch (fps?) electrical characteristics t j = 25 c unless otherwise specified. symbol parameter test conditions min. typ. max. unit sensefet section bv dss drain-source breakdown voltage v cc = 6.5v, v fb = 0v, i d = 150 a 700 v i dss zero-gate-voltage drain current v cc = 6.5v, v fb = 0v, v ds = 700v 150 a r ds(on) drain-source on-state resistance t j = 25 c, i d = 25ma 25 29 t j = 100 c, i d = 25ma 35 41 c iss input capacitance (11) v gs = 6.5v 42 pf c oss output capacitance (11) v ds = 40v, f s = 1mhz 25 pf t r rise time (11) v ds = 350v, i d = 25ma 100 ns t f fall time (11) v ds = 350v, l d = 25ma 50 ns control section f s switching frequency v cc = 6.5v, v fb = 1.0v 120 130 140 khz f s switching frequency variation (11) -25 c < t j < 125 c 5 7 % i fb(burst) feedback source current v cc = 6.5v, v fb = 0v 98 110 122 a i fb(normal) v cc = 6.5v 200 225 250 a d max maximum duty ratio v cc = 6.5v, v fb = 4.0v 54 60 66 % d min minimum duty ratio v cc = 6.5v, v fb = 0v 0 % v start uvlo threshold voltage v fb = 0v, v cc sweep 5.5 6.0 6.5 v v stop after turn-on, v fb = 0v, v cc sweep 4.5 5.0 5.5 v v dly_en shutdown delay current enable voltage v fb = v sd , v cc sweep from 6v 6.0 6.5 7.0 v burst-mode section v burh burst mode voltage v cc = 6.5v, v fb sweep 0.75 0.80 0.85 v v burl 0.70 0.75 0.80 v hys 30 50 80 mv protection section i lim peak current limit di/dt = 150ma/s 280 320 360 ma v sd shutdown feedback voltage v cc = 6.5v, v fb sweep 4.1 4.5 4.9 v i delay shutdown delay current v cc = 6.5v, v fb = 4.0v 4 5 6 a t leb leading-edge blanking time (11) 250 ns t cld current limit delay time (11) 100 ns tsd thermal shutdown temperature (11) 130 140 150 c hys 80 c total device section i op-burst operating supply current (control part only) v cc = 6.5v, v fb = 0v 360 430 500 a i op-fb v cc = 6.5v, v fb = 4v 640 760 880 a i ch startup charging current v cc = v fb = 0v, v ds = 40v 3.3 ma v ccreg supply shunt regulator v ds = 40v, v fb = 0v 6.0 6.5 7.0 v v ccreg_ tsd supply shunt regulator during tsd (11) 5.2 5.7 6.2 v note: 11. these parameters, although guaranteed, are not 100% tested in production.
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 6 FSQ500N ? green mode fairchild power switch (fps?) typical performance characteristics these characteristic gr aphs are measured at t a = 25c. 360 380 400 420 440 460 480 -40 -25 -10 5 20 35 50 65 80 95 110 125 i op ( a) temperature ( ) operating supply current (i op ) vs temperature 120 125 130 135 140 -40 -25 -10 5 20 35 50 65 80 95 110 125 f s (khz) temperature ( ) switching frequency (f s ) vs temperature figure 4. operating supply current (i op_burst ) vs. temperature figure 5. switching frequency (f s ) vs. temperature 5.5 5.7 5.9 6.1 6.3 6.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 v start (v) temperature ( ) uvlo threshold voltage (v start ) vs temperature 4.5 4.7 4.9 5.1 5.3 5.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 v stop (v) temperature ( ) uvlo threshold voltage (v stop ) vs temperature figure 6. uvlo threshold voltage (v start ) vs. temperature figure 7. uvlo threshold voltage (v stop ) vs. temperature 750 770 790 810 830 850 -40 -25 -10 5 20 35 50 65 80 95 110 125 v burh (mv) temperature ( ) burst mode voltage (v burh ) vs temperature 700 720 740 760 780 800 -40 -25 -10 5 20 35 50 65 80 95 110 125 v burl (mv) temperature ( ) burst mode voltage (v burl ) vs temperature figure 8. burst-mode voltage (v burh ) vs. temperature figure 9. burst-mode voltage (v burl ) vs. temperature
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 7 FSQ500N ? green mode fairchild power switch (fps?) typical performance characteristics (continued) these characteristic gr aphs are measured at t a = 25c. 56.0 57.0 58.0 59.0 60.0 61.0 62.0 63.0 64.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 d max (%) temperature ( ) maximum duty ratio (d max ) vs temperature 4.0 4.2 4.4 4.6 4.8 5.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 v sd (v) temperature ( ) shutdown feedback voltage (v sd ) vs temperature figure 10. maximum duty ratio (d max ) vs. temperature figure 11. shutdown feedback voltage (v sd ) vs. temperature 280.0 290.0 300.0 310.0 320.0 330.0 340.0 350.0 360.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 i lim (ma) temperature ( ) peak current limit (i lim ) vs temperature 4.5 4.7 4.9 5.1 5.3 5.5 -40 -25 -10 5 20 35 50 65 80 95 110 125 i delay ( a) temperature ( ) shutdown delay current (i delay ) vs temperature figure 12. peak current limit (i lim ) vs. temperature figure 13. shutdown delay current (i delay ) vs. temperature 6.0 6.2 6.4 6.6 6.8 7.0 -40 -25 -10 5 20 35 50 65 80 95 110 125 v ccrge (v) temperature ( ) supply shunt regulator (v ccreg ) vs temperature figure 14. supply shunt regulator (v ccreg ) vs. temperature
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 8 FSQ500N ? green mode fairchild power switch (fps?) functional description 1. startup and v cc regulation : at startup, an internal high-voltage current source supplies the internal bias and charges the external capacitor (c a ) connected to the v cc pins, as illustrated in figure 15. an internal high-voltage regulator (hv/reg) located between the drain and v cc pins regulates the v cc to 6.5v and supplies operating current. therefore, FSQ500N needs no auxiliary bias winding. v ref uvlo hv/reg 6.5v 2 d 3 v cc c a transformer i ch i start figure 15. startup block 2. feedback control : FSQ500N employs current-mode control, as shown in figur e 16. an opto-coupler (such as the fod817a) and shunt regulator (such as the ka431) are typically used to implement the feedback network. comparing the feedback voltage with the voltage across the r sense resistor makes it possible to control the switching duty cycle. when the reference pin voltage of the regulator exceeds the internal reference voltage of 2.5v, the opt o-coupler led current increases, pulling down the feedback voltage and reducing the duty cycle. this typically occurs when the line input voltage increases or the output load current decreases. 2.1 pulse-by-pulse current limit : because current- mode control is employed, the peak current through the sensefet is limited by the non-inverting input of pwm comparator (v fb *), as shown in figure 16. assuming that 225a current source flows only through the internal resistor (8r + r = 12k ), the cathode voltage of diode d2 is about 2.7v. since d1 is blocked when the feedback voltage (v fb ) exceeds 2.7v, the maximum voltage of the cathode of d2 is clamped at this voltage, clamping v fb *. therefore, the peak value of the current through the sensefet is limited. 2.2 leading-edge blanking (leb) : at the instant the internal sensefet is turned on, a high-current spike occurs through the sensefet, caused by primary- side capacitance and secondary-side rectifier reverse recovery. excessive voltage across the r sense resistor would lead to incorrect feedback operation in the current mode pwm control. to counter this effect, the fps employs a leading-edge blanking (leb) circuit. this circuit inhibits the pwm comparator for a short time (t leb = 250ns) after the sensefet turns on. 2 osc v cc i delay i fb v sd r 8r gate driver olp d1 d2 + v fb * - v fb ka431 c b v o fod817a r sense sensefet v cc figure 16. pulse width modulation (pwm) circuit 3. protection circuits : the FSQ500N has two self- protective functions: overload protection (olp) and thermal shutdown (tsd). while olp is implemented as auto-restart mode, there is no switching when tsd triggers. once the overload condition is detected; switching is terminated, the sensefet remains off, and hv/reg turns off. this causes v cc to fall. when v cc falls below the under-voltage lockout (uvlo) stop voltage of 5.0v, the protection is reset and the startup circuit charges the v cc capacitor. when v cc reaches the start voltage of 6.0v, the FSQ500N resumes its normal operation. if the fault condition is still not removed, the sensefet and hv/reg remain off and v cc drops to v stop again. in this manner, the auto- restart can alternately enable and disable the switching of the power sensefet until the fault condition is eliminated, as shown in figure 17. because these protection circ uits are fully integrated into the ic without external components, reliability is improved without increasing cost. fault situation 5.0v 6.0v v cc v ds t olp occurs olp removed normal operation normal operation power on 6.5v figure 17. auto restart protection waveforms
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 9 FSQ500N ? green mode fairchild power switch (fps?) 3.1 overload protection (olp) : overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. in this situation, the protection circuit should tri gger to protect the smps. however, even when the smps is in the normal operation, the overload protection circuit can be triggered during the load transition. to avoid this undesired operation, the overload protection circuit is designed to trigger after a specified time to determine whether the situation is tr ansient or a true overload. because of the pulse-by-pulse current limit capability, the maximum peak current through the sensefet is limited and, therefore, the maximum input power is restricted with a given input voltage. if the output consumes more than this maximum power, the output voltage (v o ) decreases below the set voltage. this reduces the current thr ough the opto-coupler led, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (v fb ). if v fb exceeds 2.7v, d1 is blocked and the 5a current source starts to charge c b slowly up to v cc . in this condition, v fb continues increasing until it reaches 4.5v, when the switching operation is terminated, as shown in figure 18. the delay time for shutdown is the time required to charge c b from 2.7v to 4.5v with 5a. in general, a 10 ~ 50ms delay is typical for most applications. this protection is implemented in auto- restart mode. v fb t 2.7v 4.5v overload protection t 12 = c b *(4.5-2.7)/i delay t 1 t 2 figure 18. overload protection 3.2 thermal shutdown (tsd): the sensefet and the control ic in one package makes it easy for the control ic to detect an abnormal over temperature of the sensefet. when the temperature exceeds ~140 c, the thermal shutdown triggers. when tsd triggers, delay current is disabled, switching operation stops, and v cc through the internal high-voltage current source is set to 5. 7v from 6.5v, as shown in figure 19. since the tsd signal prohibits the sensefet from switching, there is no switching until the junction temperature decreases sufficiently. if the junction temperature is lower than 60c typically, tsd signal is removed and v cc is set to 6.5v again. while v cc increases from 5.7v to 6.5v, the soft-start function makes the sensefet turn on and off with no voltage and/or current stress. fault situation 5.7v 6.0v v cc v ds t tsd occurs tsd removed normal operation normal operation power on 6.5v figure 19. over-temperature protection (otp) 4. soft-start : the soft-start time is tuned by an external v cc capacitor (c a ), which increases pwm comparator non-inverting input voltage together with the sensefet current slowly after it starts. before v cc reaches v start , c a is charged by the current i ch -i start , where i ch and i start are described in figure 15. after v cc reaches v start , all internal blocks are activated, so that the current consuming inside ic becomes i op . therefore, c a is charged by the current i ch -i op , which makes the increasing slope of v cc become sluggish. v cc is shifted by 6.0v negatively (it is performed in soft-start block in figure 2), then v cc -6.0v is an input of one of the input terminals of the pwm comparator. the drain current follows v cc -6.0v instead of the v fb * because of the low-dominant feature of the pwm comparator. the soft- start time can be made long or short by selecting c a , as described in figure 20. during t s/s , i delay is disabled to avoid unwanted olp. typically, t s/s is around 4.6ms with 27f of c a . 6v 5v v cc t v start v stop v ccreg t 1 t 2 t 1 =c a 6v/(i ch -i start ) t s/s =c a 0.5v/(i ch -i op ) 6.5v t s/s figure 20. soft-start function the peak value of the drain current of the power switching device is progressively increased to establish the correct working condi tions for transformers, inductors, and capacitors. the voltage on the output capacitors is progressively increased with the intention of smoothly establishing the required output voltage. it also helps to prevent transformer saturation and reduce stress on the secondary diode during startup.
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 10 FSQ500N ? green mode fairchild power switch (fps?) 5. burst operation : to minimize power dissipation in standby mode, the fps enters burst-mode operation. during the burst-mode operation, i fb(burst) decreases half of i fb(normal) . as the load decreases, the feedback voltage decreases. as shown in figure 21, the device automatically enters burst mode when the feedback voltage drops be low v burl (750mv). at this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. this causes the feedback voltage to rise. once it passes v burh (800mv), switching resumes. the feedback voltage then falls and the process repeats. burst mode alternately enables and disables switching of the power sensefet, reducing switching loss in standby mode. v fb v ds 0.75v 0.80v i ds vo vo set time switching disabled t 1 t 2 t 3 switching disabled t 4 figure 21. burst-mode operation
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 11 FSQ500N ? green mode fairchild power switch (fps?) package dimensions 5.08 max 0.33 min 2.54 7.62 0.56 0.355 1.65 1.27 3.683 3.20 3.60 3.00 6.67 6.096 9.83 9.00 7.62 9.957 7.87 0.356 0.20 notes: unless otherwise specified a) this package conforms to jedec ms-001 variation ba b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash, and tie bar extrusions. d) dimensions and toleranc es per asme y14.5m-1994 8.255 7.61 e) drawing filename and revsion: mkt-n08frev2. (0.56) figure 22. 8-lead, molded dual inline package (mdip) package drawings are provided as a service to customers considering fairchild components. drawings may change in any manner wit hout notice. please note the revision and/or date on the dr awing and contact a fairchild semiconductor representative to verify or obtain th e most recent revision. package specifications do not expand the terms of fairchild?s worl dwide terms and conditions, specifically the warranty therein , which covers fairchild products. always visit fairchild semiconductor?s online pack aging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .
? 2009 fairchild semiconductor corporation www.fairchildsemi.com FSQ500N ? rev. 1.0.0 12 FSQ500N ? green mode fairchild power switch (fps?)


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